HEFEI — For the first time in more than a decade, Samsung, SK Hynix, and Micron together account for less than 90% of the global DRAM market. ChangXin Memory Technologies, the Chinese chipmaker whose share was in the low single digits three years ago, announced Saturday that it had crossed another threshold separating it from the industry’s established leaders.
At the World Manufacturing Convention in Hefei, CXMT said its fifth-generation DRAM platform, G5, had entered mass production. The announcement was expected—the company had signaled the milestone for months—but its technical details mark a turning point.
CXMT said it had reduced the spacing of critical features in its memory array to 11.95 nanometers. Until recently, that level of precision was associated almost exclusively with fabs able to access ASML’s extreme-ultraviolet lithography machines.
CXMT does not have those machines. Western export controls have blocked shipments of EUV tools to Chinese chipmakers since 2022, and the restrictions have only tightened since. What CXMT has instead is patience and a manufacturing technique called quadruple patterning, which repeats photolithography steps four times to print finer circuits than the underlying equipment was designed to produce. It is slower, more expensive per step, and more sensitive to defects than EUV. It also, apparently, works.
The two products CXMT unveiled alongside the G5 announcement are 24-gigabit LPDDR5X mobile memory chips targeting mid- to high-end smartphones in China. Both carry 50 percent more capacity per die than CXMT’s equivalent previous-generation chips, and the company said the G5 process produces at least 50 percent more dies per wafer than the previous platform — a manufacturing efficiency gain that would significantly reduce cost per chip if it translates cleanly into volume. CXMT has not disclosed actual yield rates, which is the figure that would confirm whether the efficiency claim holds under production conditions.
The context for Saturday’s announcement is a company that has moved faster than the export-control architecture anticipated. When CXMT completed its IPO on Shanghai’s STAR Market in July, its stock surge on debut rattled memory stocks globally, with Micron and SK Hynix both falling sharply on the day. The listing raised approximately $8.6 billion, with proceeds earmarked for G5 development, high-bandwidth memory research, and production capacity expansion. CXMT plans to push wafer output to roughly 375,000 per month by the end of 2026, up from approximately 300,000 at present.
The market share picture entering Saturday’s announcement: Samsung held 39 percent of global DRAM in the second quarter of 2026, with SK Hynix at 26 percent and Micron at 25 percent, according to Counterpoint Research. South Korea’s memory sector has been partially insulated from CXMT’s rise by the AI memory boom, with both Samsung and SK Hynix producing high-bandwidth memory for Nvidia accelerators at margins well above the commodity DRAM segments where CXMT competes. CXMT’s 10 percent share is overwhelmingly concentrated in the Chinese smartphone supply chain; its products do not yet appear in flagship devices in the US market or premium laptops.
That boundary defines where the G5 threat is real and where it remains theoretical. Chinese smartphone manufacturers have substituted CXMT memory aggressively in mid-tier handsets, which is why the big three’s combined share has slipped below 90 percent for the first time. Entering the premium tier requires consistently demonstrated yields at G5 node conditions, regulatory clarity on component sourcing in non-Chinese markets, and a product roadmap that extends beyond LPDDR5X into the next-generation specifications that Samsung and SK Hynix are already qualifying.
Apple asked the Trump White House earlier this year to keep CXMT off the Pentagon blacklist, arguing that its supply chain had become structurally dependent on Chinese memory in ways that could not be quickly unwound. The administration declined. CXMT remains off the Commerce Department’s Entity List for now, but its access to Western chipmaking equipment is already restricted, and Saturday’s announcement will not make that regulatory situation easier.
The Global Times reported that CXMT executives described the G5 as a demonstration that China’s semiconductor industry can reach global standards on its own terms. The framing reflects the geopolitical weight that Beijing has invested in CXMT’s progress — the company has received substantial state support since its founding, and Saturday’s announcement arrives at a moment when the Chinese government is under pressure to show returns on that investment.
What G5 does not address is the one front where Samsung and SK Hynix have built an insurmountable lead for the near term: high-bandwidth memory. HBM3E is where the real margin sits in 2026, driven by Nvidia accelerator demand that CXMT cannot yet serve. The company’s IPO prospectus listed HBM development as a long-term target. No timeline has been announced. No products have been demonstrated in testing.
The G5 announcement is a real achievement on a front that matters — mobile DRAM for a market of more than a billion devices. It shows that the quadruple patterning workaround, dismissed by some analysts as insufficient when CXMT first adopted it as a development pathway, can reach competitive node dimensions at scale. What it does not show is that CXMT can close the gap where the industry’s revenue is now concentrated.
